| 摘要 |
A power on reset circuit includes a charge and discharge circuit for performing charge or discharge operation on the basis of a potential obtained by dividing a power supply voltage using a potential divider circuit. The potential thus outputted is held by a first latch circuit to output a reset on signal or a reset off signal. The output state of the charge and discharge circuit is inverted to the power supply voltage on the basis of the output potential of the first latch circuit using a second latch circuit, which comprises the minimum number of elements including a NAND gate, an inverter and two capacitors. Thus, the power on reset circuit can obtain a stable reset signal if the initial state of the reset signal output is in either the power supply voltage level or the ground level.
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