发明名称 Capacitor circuit structure for determining overlay error
摘要 A structure suitable for aligning two patterned conductive layers that are separated by a dielectric layer is described. Included in the lower pattern is a square and, as part of the upper pattern, four T-shaped capacitor electrodes are provided. The latter are positioned so that, when the alignment is exact, they all overlap the square by the same amount. Thus, under conditions of exact alignment, the capacitance value measured between any one of the top electrodes and the square will be the same for all electrodes. When, however, misalignment occurs, the degree of overlap will change, increasing on one side of the square while decreasing at the opposite side. In this way a comparison of measured capacitance values between electrodes located on opposing sides of the square will indicate whether, and what extent, misalignment has occurred.
申请公布号 US6143621(A) 申请公布日期 2000.11.07
申请号 US19990332382 申请日期 1999.06.14
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY 发明人 TZENG, KUO-CHYUAN;CHUNG, WEN-JYE
分类号 H01L23/544;(IPC1-7):H01L21/76 主分类号 H01L23/544
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