| 摘要 |
PROBLEM TO BE SOLVED: To generate a test mode signal using a pad for outputting DC voltage of a DC voltage generating section in the inside of a chip without using another input pad. SOLUTION: This semiconductor memory is provided with a DC voltage generating section 10 generating DC voltage when power source voltage is applied, a pad 20 for outputting DC voltage to the outside, a DC voltage level sensing section 30, an operation mode judging section 40 generating a mode signal with which a test mode or a normal mode can be discriminated by a method that DC voltage having a level higher than the Dc voltage of the DC voltage generating section is applied to a pad for outputting source voltage and DC voltage, and a mode signal continuous control section 50 in which, when a DC voltage higher than power source voltage is applied previously to the pad for outputting DC voltage, the operation mode judging section outputs a test mode signal conforming to the DC voltage outputted from the DC voltage level sensing section, and when power source voltage is applied previously, control is performed so that the operation mode judging section outputs a normal mode signal.
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