| 摘要 |
PROBLEM TO BE SOLVED: To retain confidentiality of the IP of an IP owner and at the same time mount a plurality of IPs within the same chip by providing first and second circuit regions for retaining a function for performing a logic processing operation according to the set data when the set data is given externally. SOLUTION: Protection information can be retained for each of a plurality of basic circuit regions 2 that are arranged in an array. Since no protection information has been set to a retention circuit 16 in an initial state immediately after the manufacture, the primary reader of an FPGA can select a circuit region that the user wishes to use for writing the set data and can read the data to verify the set data. However, once the protection information is set to the circuit region that is used by the primary user, the protection information cannot be erased, so that the user can mixedly mount a user circuit and an IP circuit for use.
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