发明名称 Clock regeneration apparatus for synchronous data transmission
摘要 A clock regeneration apparatus which regenerates and distributes a timing signal in a synchronous data transmission network. The network is organized by a plurality of transmission units being linked in a ring topology, and at least two transmission units have external clock sources for synchronization purposes. The clock regeneration apparatus, disposed in each transmission unit, has a clock source list that contains entries for at least two line clock sources provided from neighboring transmission units. A clock selection controller selects a reference clock source with which the transmission unit is to be synchronized. A clock quality transmitter supplies one of the two neighboring transmission units that is not selected as the reference clock source by the clock source selection controller, with a message requesting not to use a corresponding line clock source for synchronization. This message transmission occurs only when the transmission unit is configured as a slave unit, and when the clock quality messages received from the neighboring transmission units exhibit equal clock quality levels continually for a predetermined period.
申请公布号 US6144675(A) 申请公布日期 2000.11.07
申请号 US19980109845 申请日期 1998.07.02
申请人 FUJITSU LIMITED 发明人 WAKABAYASHI, JUN;SHIBA, KAZUHIKO
分类号 H04L7/00;H04J3/06;H04Q11/04;(IPC1-7):H04J3/06 主分类号 H04L7/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利