| 摘要 |
An electrostatic discharge (ESD) protection circuit is formed on a semiconductor wafer. The semiconductor wafer comprises a substrate, an active region having a doped area formed in a predetermined area on the surface of the substrate, and a field oxide layer made of silicon oxide formed on the surface of the substrate and surrounding the active region. The HV MOS comprises a gate made by stacking a doped polysilicon layer on a gate oxide layer. A DDD (double diffuse drain) source and a DDD drain are installed inside the doped area and positioned on opposite sides of the gate, and an insulation layer made of silicon dioxide is positioned between the gate and the source and between the gate and the drain. There is no drift region at the intersection of the doped area of the active region and the insulation layer. The input port of the protection circuit is electrically connected to the source. The drain and the gate are electrically connected to a voltage source. When an input voltage from the input port is higher than a critical voltage between the source and the drain, the source and the drain will electrically conduct together through the doped area in the active region so as to eliminate the input voltage from the input port.
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