发明名称 Electrostatic discharge protection for integrated circuit semiconductor device
摘要 A connection terminal (3), for connecting internal circuitry (2) of a semiconductor device to external circuitry, can vary, in use of the device, within a predetermined range of potentials including a potential equal or close to the potential of one of the power supply lines (GND) of the device. The device is provided with electrostatic discharge protection circuitry (4, 11) including a field-effect transistor (11) having a source region and gate connected to the connection terminal (3), and a drain region connected to the one power supply line (GND). The transistor (11) turns ON when the connection-terminal potential falls below a predetermined protection potential, e.g. -1 volt. Its conductivity type (P-type) is such that it is otherwise OFF. In such a device, the internal circuitry is effectively protected against electrostatic discharges without limiting the range of potentials of the connection terminal during normal use and without problems associated with parasitic capacitance of the protection transistors. <IMAGE>
申请公布号 EP0940852(A3) 申请公布日期 2000.11.02
申请号 EP19990300077 申请日期 1999.01.06
申请人 FUJITSU MICROELECTRONICS EUROPE GMBH 发明人 DEDIC, IAN JUSO
分类号 H01L27/04;H01L21/822;H01L27/02;H02H7/20;H05F3/02 主分类号 H01L27/04
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