发明名称 REPRODUCING APPARATUS
摘要 PROBLEM TO BE SOLVED: To obtain a reproducing apparatus which correctly decodes effective data inputted consecutively to a preamble without wrong converging a PLL circuit and an AGC circuit into a state in which a clock phase is shifted by 180 deg. to reproduction data while the preamble is being inputted. SOLUTION: A PLL circuit consisting of an AD converter 22, a likelihood reference temporary identification circuit 40, a phase error detection circuit 15, a DA converter 17, a loop filter 18 and a voltage control oscillator 20 generates a clock signal 21 synchronized in phase with reproduction data. The likelihood reference temporary identification circuit 40 obtains a differential likelihood according to a partial response characteristic, changes a threshold value with the use of the differential likelihood, and obtains a temporary identification data 9 by comparing the threshold value and a sampling equalization signal 5.
申请公布号 JP2000306335(A) 申请公布日期 2000.11.02
申请号 JP19990110058 申请日期 1999.04.16
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OTA HARUO;KATO KEIICHI
分类号 G11B20/10;(IPC1-7):G11B20/10 主分类号 G11B20/10
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