| 摘要 |
<p>A class-D amplifier comprising an input integrating stage (Op-Amp, R1, C), a modulating stage (PWM) of the integrated input signal output by said integrating stage, using as a carrier an alternate waveform (Vtr) of a frequency (fsw), sufficiently higher than the frequency band of the analog input signal, outputting a digital signal switching between a positive voltage (+Vcc) and a negative voltage (-Vcc), and whose average value (Vo) represents an amplified replica of the input analog signal, an output power stage (BUFFER), producing an output digital signal (Vout), a feedback line constituted by a resistor (R2) connected between the output of said output power stage (BUFFER) and an input node of an operational amplifier (Op-Amp) constituting said integrating stage, and a low pass filter reconstructing an output analog signal (Vo), further comprises a delay stage (DELAY Td), functionally coupled in the direct path of propagation of said digital signal from the output of said PWM stage to an input of said output power stage (BUFFER), delaying said digital signal by a delay (Td) whose value is defined in function of a desired broadening of the bandwidth and in consideration of the corresponding restriction of the range of variation of the duty-cycle of the output digital signal. <IMAGE></p> |
