| 摘要 |
<p>A process for forming a true chip scale package comprising the sandwiching of a silicon wafer (11) with a large number of identical die therein between top and bottom metal contact plates (12a, 13, 20) of the same size as the wafer. The sandwich is secured together as by soldering, and the die and contact plates are singulated in the form of a final chip scale package. The edge of each chip may have an insulation band formed thereon. Slots (34) may be formed in the top contact to define, with the edge saw cuts, a separate contact area on each top contact.</p> |
