发明名称 DEVICE AND METHOD FOR CLOCK SIGNAL CONTROL
摘要 PROBLEM TO BE SOLVED: To enable control of the frequency and phase of sampling clock signal without depending on a special control image by controlling the frequency and phase of the signal, through measurement of the measured number by which a differentiated value of the sampled signal is made a specified value or more, so that the number may be the maximum. SOLUTION: A sampled signal by a sampling means PLL 15 is differentiated and the number by which the differentiated value is made not less than a specified value is measured by a measurement means (automatic control part 17). The frequency and phase of sampling clock signal are controlled by a clock signal control means (microcomputer) 14 so that the measured number by the part 17 may become the maximum. Namely, at this control device, sampling is performed according to the sampling clock signal and the number by which the differentiated value of the sampled signal becomes not less than a specified value is measured, thereby enabling the control of frequency and phase of the signal.
申请公布号 JP2000305503(A) 申请公布日期 2000.11.02
申请号 JP19990116822 申请日期 1999.04.23
申请人 FUJITSU LTD 发明人 FUKUDA TAKATOSHI
分类号 H04N5/06;G09G3/20;G09G5/36;H04N5/14;(IPC1-7):G09G3/20 主分类号 H04N5/06
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