摘要 |
<p>The invention concerns a static memory wherein when the cell is in static condition, the written binary data is maintained by circulating in each access transistor (TA1, TA2) a drain-source current greater than the leakage current of each storage transistor (TM3, TM4). The drain-source current is at least ten times greater than the leakage current of each storage transistor; and said drain-source current is circulated by applying different polarising voltages (VR, Vdd) in some of the terminals of the access transistors (TA1, TA2), for instance by applying a bulk effect to each access transistor, said drain current circulating in the access transistor concerned being then the leakage current of the access transistor.</p> |