发明名称 LOAD DRIVING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To sufficiently secure output voltage width while actualizing reduction in chip area. SOLUTION: A high-voltage output circuit 21 has basic constitution wherein an N channel type LDMOS 22 is connected between a high-voltage power terminal VDDH and an output terminal VOUT, a parallel circuit of a resistor 23 and a Zener diode 24 with its polarity is connected between the gate and source of the LDMOS 22, and an N channel type LDMOS 25 is connected forward between the output terminal VOUT and a ground terminal through the Zener diode 24. In addition to the basic constitution, the high-voltage output circuit 21 has a P channel type LDMOS 26 connected in parallel to the LDMOS 22 and an N channel type LDMOS 27 connected between the high-voltage power terminal VDDH and ground terminal.
申请公布号 JP2000307406(A) 申请公布日期 2000.11.02
申请号 JP19990115054 申请日期 1999.04.22
申请人 DENSO CORP 发明人 IWAMURA TAKEHIRO;KATAYAMA OSAMU
分类号 G05F3/24;H03K17/10;H03K17/567;H03K17/687;H03K19/0175;(IPC1-7):H03K17/687;H03K19/017 主分类号 G05F3/24
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