发明名称 Power factor correction controller circuit
摘要 <p>A power factor correction controller circuit 100 for controlling the duration of each on time phase and off time phase of a switched inductor power factor correction circuit 20, 30, 40, 50, 100 which is adapted for use with a rectifying arrangement 9, 10, 60, 70 producing a substantially regulated output voltage, Vo. The controller circuit 100 comprises an input terminal 114 for receiving a signal representative of Vo; an output terminal 131 for outputting a signal representative of the duration of each on time phase and off time phase; and on time determination means 110, 111, 112, 113, 114, 115, 116, 117; wherein the on time determination means acts to vary the maximum duration of each on time phase in an inverse dependence on Vo. &lt;IMAGE&gt;</p>
申请公布号 EP1049239(A1) 申请公布日期 2000.11.02
申请号 EP19990108444 申请日期 1999.04.30
申请人 MOTOROLA, INC. 发明人 L'HERMITE, FRANCOIS;TURCHI, JOEL
分类号 H02M1/00;H02M1/42;(IPC1-7):H02M1/12;H02M3/156 主分类号 H02M1/00
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