发明名称 METHOD FOR PLANARIZING INTERLAYER DIELECTRIC
摘要 PURPOSE: A planarization method of an interlayer dielectric is provided to prevent voids and particles, and easily control concentrations of impurities by using a silicon nitride as a buffer layer and an USG(undoped silicate glass) instead of a BPSG(boro phosphor silicate glass). CONSTITUTION: On an active region defined by a field oxide(33), a gate oxide(35) and a gate(37) are formed. Then, an impurity doped region(39) is formed by implanting ions. A silicon nitride(41) is formed on the entire surface of the resultant structure by performing N2 plasma treatment. Then, an USG film(43) is formed on the silicon nitride(41).
申请公布号 KR100266014(B1) 申请公布日期 2000.11.01
申请号 KR19970052953 申请日期 1997.10.16
申请人 HYUNDAI MICRO ELECTRONICS CO., LTD. 发明人 KIM, YEONG MIN
分类号 H01L21/302;(IPC1-7):H01L21/302 主分类号 H01L21/302
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