| 摘要 |
PURPOSE: A method for processing single instruction multiple data in a multimedia signal processor is provided to obtain a vector processor which operates a vector data(multiple data element per operand) for providing a high computation ability wherein a processor a single instruction multiple data architecture having a RISC type instruction set. CONSTITUTION: A multimedia processor(100) includes a processing core(105) formed of a universal processor(110) and a vector processor(120). The processing core(105) is connected with the other part of the multimedia processor(100) through a cache sub-system(130) which includes SRAM(160, 190), ROM(170) and a cache control(180). The cache control(180) may form the SRAM(160) using an instruction cache(162) and a data cache(164) with respect to the processor(110) and form a SRAM(190) using an instruction cache(192) and a data cache(194) with respect to the vector processor(120). One chip ROM(170) includes a data and instruction with respect to the processors(110, 120) and may be formed of a cache. The cache sub-system(130) connects the processors(110, 120) to two system buses(140, 150) and operates as a cache and switching station with respect to the apparatuses connected to the processors(110, 120) and the buses(140, 150).
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