发明名称 |
ROW DECODER IN MEMORY DEVICE |
摘要 |
PURPOSE: A row decoder of a semiconductor memory device is provided to reduce an area of a chip design and to improve turn-on time of a word line by combining a plurality of word line drivers with one word time driver and immediately turning-on a word line after receiving an address indicating the word line from an address selector. CONSTITUTION: An address selector(50) selects a specific address, wherein a number of the address selector(50) is 64. A global row decoder(40) enables a specific word-line. The global row decoder(40) includes a word-line driver for driving a plurality of word-lines. The address selector(50) selectively connects the word-line driver to the specific word-line according to a certain row address signal. The word line driver is consist of a word-line boosting signal input terminal and a plurality of MOS transistors connected in serial between grounds.
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申请公布号 |
KR100265590(B1) |
申请公布日期 |
2000.11.01 |
申请号 |
KR19970017501 |
申请日期 |
1997.05.07 |
申请人 |
HYUNDAI ELECTRONICS IND. CO., LTD |
发明人 |
CHA, JAE-YONG |
分类号 |
G11C11/407;(IPC1-7):G11C11/407 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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