发明名称 Ferroelectric field effect transistor having a gate electrode being electrically connected to the bottom electrode of a ferroelectric capacitor
摘要 A ferroelectric non-volatile memory in which each memory cell consists of a metal-ferroelectric-metal ("MFM") capacitor and a FET on a semiconductor substrate. The MFM and the FET are separated by an interlayer dielectric layer. A local interconnect connects the gate electrode of the FET to the bottom electrode of the MFM capacitor. Preferably, the MFM is located directly above the gate electrode, and the local interconnect is a conductive plug in a filled via. Preferably, the ferroelectric thin film of the MFM comprises a layered superlattice material. Preferably, a dielectric metal oxide insulator layer is located between the gate electrode and the semiconductor substrate.
申请公布号 US6140672(A) 申请公布日期 2000.10.31
申请号 US19990263639 申请日期 1999.03.05
申请人 SYMETRIX CORPORATION;MATSUSHITA ELECTRONICS CORPORATION 发明人 ARITA, KOJI;PAZ DE ARAUJO, CARLOS A.
分类号 H01L21/02;H01L21/768;H01L21/8246;H01L27/115;(IPC1-7):H01L29/76 主分类号 H01L21/02
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