发明名称 Dual damascene process and structure with dielectric barrier layer
摘要 An improved dual damascene structure, and process for manufacturing it, are described in which the via hole is first lined with a layer of silicon nitride prior to adding the diffusion barrier and copper. This allows use of a barrier layer that is thinner than normal (since the silicon nitride liner is an effective diffusion barrier) so that more copper may be included in the via hole, resulting in an improved conductance of the via. A key feature of the process that is used to make the structure is the careful control of the etching process. In particular, the relative selectivity of the etch between silicon oxide and silicon nitride must be carefully adjusted.
申请公布号 US6140220(A) 申请公布日期 2000.10.31
申请号 US19990349843 申请日期 1999.07.08
申请人 INDUSTRIAL TECHNOLOGY INSTITUTE RESEACH 发明人 LIN, KANG-CHENG
分类号 H01L21/768;(IPC1-7):H01L21/476 主分类号 H01L21/768
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