发明名称 Arrangement with master and slave units
摘要 PCT No. PCT/DE95/00739 Sec. 371 Date Jul. 21, 1997 Sec. 102(e) Date Jul. 21, 1997 PCT Filed Jun. 6, 1995 PCT Pub. No. WO96/16366 PCT Pub. Date May 30, 1996An arrangement in which at least one master unit is linked via a bus to a multiple of slave units, each slave unit having a memory in which the master unit carries out read and/or write accesses. The master unit can initiate a data access uniformly on each of the slave units according to a predetermined communication protocol. Moreover, a slave unit is proposed which is suitable for a communication with a master unit according to this protocol. The arrangement can be used in programmable controllers.
申请公布号 US6141736(A) 申请公布日期 2000.10.31
申请号 US19970836590 申请日期 1997.07.21
申请人 SIEMENS AKTIENGESELLSCHAFT 发明人 ABERT, MICHAEL;KUEHLERS, JUERGEN;RENSCHLER, ALBERT
分类号 G05B19/042;G06F13/16;(IPC1-7):G06F12/00 主分类号 G05B19/042
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