发明名称 |
Digital signal processors with virtual addressing |
摘要 |
<p>A high speed Digital Signal Processor has memory management unit with virtual to physical address translation facilities. A content addressable translation lookaside buffer is provided with walking table logic and a translation table base register pointing to a translation table in external memory. Virtual addresses may be used for external and local memory or the local memory may be addressed directly. An independent claim is included for a method of addressing memory in a digital signal processor.</p> |
申请公布号 |
EP1046998(A1) |
申请公布日期 |
2000.10.25 |
申请号 |
EP19990401022 |
申请日期 |
1999.04.22 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED;TEXAS INSTRUMENTS FRANCE |
发明人 |
CHAUVEL, GERARD;LASSERRE, SERGE;D'IVERNO, DOMINIQUE |
分类号 |
G06F9/34;G06F12/06;G06F12/08;G06F12/10;G06F15/78;(IPC1-7):G06F12/10 |
主分类号 |
G06F9/34 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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