发明名称 Bond pad option for integrated circuits
摘要 An integrated circuit (10) having a first and second bond pads (41, 43), a latch circuit (50), and a voltage lead (31). Different configurations of the internal circuitry (20) of the integrated circuit (10) are selected by applying the voltage lead (31) either to the first or second bond pads (41, 43). This result is achieved because the latch circuit (50), coupled between the first and second bond pads (41, 43), is capable of inverting the voltage response seen at the first bond pad. <IMAGE>
申请公布号 EP0742589(B1) 申请公布日期 2000.10.25
申请号 EP19960107092 申请日期 1996.05.06
申请人 UNITED MEMORIES, INC.;NIPPON STEEL SEMICONDUCTOR CORPORATION 发明人 PARRIS, MICHAEL;CORDOBA, MICHAEL V.
分类号 H01L21/60;H01L23/485;H01L23/50;H01L27/118 主分类号 H01L21/60
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