Memory defragmentation in chipcards

摘要

A portion (34) of a memory to be defragmented is structured in pages (35) and the defragmentation process is controlled by a descriptor control unit (32) connected to an intermediate buffer (36), which is a write-forward or a back-trace buffer. The defragmentation process is carried out as a sequence of copy operations on copy chunks, while the descriptors hold information required to restore the contents of a copy chunk if there is a power interruption during the copy operation. Independent claims are included for a chip-card and for a computing device.