发明名称 |
Bus master for connecting to peripheral components is connected to bus, has functional circuits for outputting bus data transfer request signals, arbiter and heuristic request initiator |
摘要 |
The compatible bus master contains functional circuits for outputting a local request signal to request a data transfer on the bus and an arbiter with a circulating request control program and a heuristic request initiator. The compatible bus master is connected to a bus and contains several functional circuits for outputting a local request signal to request a data transfer on the bus and an arbiter with a circulating request control program (RIS) and a heuristic request initiator (HII). The request control program receives and stores the local request, generates a bus request signal and sends it to the initiator, which repeatedly passes it to the bus to request the bus status after the bus replies with a delay transmit abnormal termination. The initiator informs the control program that it is performing the transfer if the bus not respond with a delay-transmit abnormal termination. Independent claims are also included for the following: an arbiter for a compatible bus master and a determination method for an arbiter.
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申请公布号 |
DE19956111(A1) |
申请公布日期 |
2000.10.26 |
申请号 |
DE19991056111 |
申请日期 |
1999.11.22 |
申请人 |
VIA TECHNOLOGIES, INC. |
发明人 |
LAI, JIIN;TSAI, CHAU-CHAD;YANG, CHEN-ING;TSAI, CHI-CHE |
分类号 |
G06F13/36;G06F13/362;(IPC1-7):G06F13/362 |
主分类号 |
G06F13/36 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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