| 摘要 |
In a semiconductor memory device having a burst function, a memory circuit inputs and outputs information corresponding to an external input signal in synchronization with an internal clock signal. A burst operation control circuit receives an external reference clock signal and an enable signal for switching a burst operation mode and a stand-by mode, so as to suspend supplying of the external input signal in the burst operation mode and suspend generation of the first internal clock signal in the stand-by mode.
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