发明名称 High VSWR mismatch output stage
摘要 The present invention teaches a variety of high VSWR mismatch output stages and methods for protecting output stages during high VSWR operation. To accomplish these goals, the present invention teaches absorbing reverse base current arising at the base of the power transistor of the output stage. In one embodiment, a variable impedance device such as a transistor is coupled to the base of the power transistor such that when the base-emitter voltage exceeds a predefined voltage, the variable impedance device goes into a low impedance mode and absorbs a portion of the base current. In another embodiment, feedback control circuitry is incorporated into the output stage bias circuitry in order to control the total base current.
申请公布号 US6137366(A) 申请公布日期 2000.10.24
申请号 US19980056335 申请日期 1998.04.07
申请人 MAXIM INTEGRATED PRODUCTS, INC. 发明人 KING, JOEL R.
分类号 H02H7/20;H03F1/30;H03F3/19;(IPC1-7):H02H7/20;H03F3/04 主分类号 H02H7/20
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