| 摘要 |
A low power clock oscillator circuit for driving microprocessors and other digital circuits is provided. The clock oscillator includes a resonant network for providing a sinusoidal waveform at a predetermined frequency. A first amplifier for amplifying the sinusoidal input waveform provides an output to a second amplifier. The second amplifier converts the amplified sinusoidal waveform to a continuous pulse output having a level-shifted voltage level greater than the amplitude of the sinusoidal waveform. The first amplifier is powered from a power source having a voltage level that is less than the power source that powers the second amplifier. Additionally, the second amplifier includes an enable input for disabling the continuous pulse output to permit decreased power operation with fast restart capability.
|
