发明名称 Integrated testing method and apparatus for semiconductor test operations processing
摘要 A semiconductor wafer testing and inspecting apparatus and method are provided in which a plurality of tests are performed on each of a plurality of wafers from a wafer cassette and before the wafers are returned to a packaging cassette or further processing. A carousel conveyor receives each wafer from a cassette and indexes it through each of a plurality of testing stations, including preferably at least two electrical testing stations at which a probe contacts each device or die on the wafer to perform an electrical test, with the two stations performing different electrical tests. The wafers are each moved through at least one visual or optical testing station at which each of the dies on the wafer is inspected. Preferably, a testing head or probe is moved in a plane parallel to the wafer sequentially to positions over each of the devices on the wafer to perform a test on or otherwise inspect the devices on the wafer. When in each of the positions, the wafer is lifted by a "pop-up" chuck or elevator that brings a device on the wafer into contact with the probe needles. A robot arm may be provided in addition or in the alternative to the carousel to move the wafers, for example, into and out of cassettes, to and from a standby station, or to and from a testing station or holder on the carousel.
申请公布号 US6137303(A) 申请公布日期 2000.10.24
申请号 US19980211455 申请日期 1998.12.14
申请人 SONY CORPORATION;SONY ELECTRONICS INC. 发明人 DECKERT, RICHARD ALLAN;ENGELKING, STEVEN;EVANS, JOEY DEAN
分类号 G01R31/28;(IPC1-7):G01R1/04 主分类号 G01R31/28
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