| 摘要 |
PROBLEM TO BE SOLVED: To read out simultaneously data of plural bits from a storage element region and to output and supply only selected arbitrary data to the outside adjusting to a high speed data output period. SOLUTION: Data of each bit read out simultaneously from a memory cell array MSA is amplified to a logical level by data amplifiers DA0 to DA7. At the time, operation of each data amplifier is controlled by read-mask signals RM0 to RM7, only the prescribed bit selected arbitrarily is amplified ordinarily and outputted, and amplified output of the other bits is fixed to a L level. And data is converted to serial data by parallel-serial conversion circuits P-Se and P-So and successively outputted synchronizing with rise and fall of a basic clock CLK by a multiplexer MUX, and applied to a NMOS transistor NTR of an open drain output circuit. Thereby, output of bits other than the prescribed bit in an output pad PA is kept at Hi-Z.
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