发明名称 Electronic circuit with dual edge triggered flip-flop
摘要 The electronic circuit contains dual edge triggered flip-flop, which loads data on both the rising edge and the falling edge of a clock signal. The clock signal is supplied by a clock supply circuit with an enable input and a source input for receiving a source signal. The clock supply circuit toggles the clock signal as from an earliest available edge of the source signal after the enable signal at the enable input switches to an active state, irrespective of a polarity of said earliest available edge.
申请公布号 US6137331(A) 申请公布日期 2000.10.24
申请号 US19980184533 申请日期 1998.11.02
申请人 U.S. PHILIPS CORPORATION 发明人 PESET LLOPIS, RAFAEL
分类号 H03K3/012;H03K3/037;H03K3/12;H03K3/286;H03K3/356;(IPC1-7):H03K3/12 主分类号 H03K3/012
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