发明名称 CPU mode switching circuit changing operation mode responsive to a power on reset signal and an external reset signal
摘要 A CPU mode switching circuit without a mode switching terminal includes a power on reset circuit generating a power on reset signal when circuit power is turned on, a reset signal generating circuit coupled to the power on reset circuit for receiving the power on reset signal and an external reset signal terminal for receiving an external reset signal. The reset signal generating circuit outputs an internal reset signal in response to the received signals. The CPU mode switching circuit further includes a CPU mode selector having operation mode data as internal data thereof and a CPU coupled to the CPU mode selector and the reset signal generating circuit. The CPU mode selector resets the internal data in response to the power on reset signal. The CPU changes the operation mode according to the internal data of the CPU mode selector when the CPU receives the internal reset signal. Then, the CPU rewrites the internal data of the CPU mode selector.
申请公布号 US6138181(A) 申请公布日期 2000.10.24
申请号 US19980150740 申请日期 1998.09.10
申请人 OKI ELECTRIC INDUSTRY CO., LTD. 发明人 AIDA, YOSHIHISA;KEIICHI, ITOH
分类号 G06F1/24;G06F15/78;(IPC1-7):G06F13/00 主分类号 G06F1/24
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