发明名称 PHASE-LOCKED LOOP CIRCUIT
摘要 PROBLEM TO BE SOLVED: To oscillate a voltage controlled oscillator(VCO) with a frequency and a phase at the time of synchronizing even when a reference frame signal is abnormal. SOLUTION: When a frame signal 22 is normal, a switch 7 is connected to the side of a low-pass filter 106 and a VCO 108 is oscillated at the frequency synchronized to the frame signal 22 by feedback control. In the state of weakening a received radio wave and making the frame signal 22 abnormal, since the voltage of an RSSI signal 21 expressing radio wave strength is lowered as well, the output signal of a comparator 10 is inverted, the switch 7 is connected to the side of a voltage storage part 12 and a switch 13 is turned off. As a result, a control voltage stored in the voltage storage part 12 at normal time is supplied to the VCO 108 and the VCO 108 continuously oscillates at the same frequency and phase as the normal time.
申请公布号 JP2000299637(A) 申请公布日期 2000.10.24
申请号 JP19990104863 申请日期 1999.04.13
申请人 NEC SHIZUOKA LTD 发明人 KATO KENICHI
分类号 H03L7/14;H03L7/093;H04L7/08 主分类号 H03L7/14
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