发明名称 Serial switch driver architecture for automatic test equipment
摘要 A tristate circuit for driving three signal levels to a pin of a device-under-test is disclosed. The tristate circuit includes a driver having an output at a first signal level and adapted for coupling to the pin. A first switching unit couples to the output and responds to a programmed signal. The first switching unit operates to selectively alter the first signal level to a second signal level. A second switching unit connects serially to the first switch. The second switching unit responds to a second programmed signal and operates to cooperate with the first switch to alter the second signal level to a third signal level.
申请公布号 US6137310(A) 申请公布日期 2000.10.24
申请号 US19990253175 申请日期 1999.02.19
申请人 TERADYNE, INC. 发明人 BREGER, PETER
分类号 G01R31/319;(IPC1-7):H03K19/00 主分类号 G01R31/319
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