发明名称 |
Method of forming CMOS circuitry including patterning a layer of conductive material overlying field isolation oxide |
摘要 |
A method for forming CMOS DRAM circuitry is disclosed and which includes forming a substrate comprising an array NMOS region, a peripheral NMOS region, and a peripheral PMOS region; forming a pair of insulated and spaced gate lines in the array NMOS region; forming at least one electrically conductive plug in the array NMOS region and which spans between the pair of gate lines; forming a barrier layer over the pair of gate lines in the array NMOS region, the peripheral NMOS and the peripheral PMOS region; and patterning and etching in the peripheral PMOS region to form peripheral PMOS region gate lines including removing a portion of the barrier layer in the PMOS peripheral region and leaving barrier layer material in the NMOS region masking over the electrically conductive plug |
申请公布号 |
US6136637(A) |
申请公布日期 |
2000.10.24 |
申请号 |
US19980124560 |
申请日期 |
1998.07.28 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
AHMAD, AFTAB;KELLER, DAVID J.;LOWREY, TYLER A. |
分类号 |
H01L21/8234;H01L21/8239;H01L21/8242;(IPC1-7):H01L21/823 |
主分类号 |
H01L21/8234 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|