| 摘要 |
A method and a circuit for multiplication on a finite field which operate fast and involve a small circuit scale. There is provided a multiplication circuit on a finite field for multiplication of two arbitrary elements a=(a0, a1, . . . , am-1) and b=(b0, b1, . . . , bm-1) of a Galois field GF(2m) utilizing a polynomial f=xm+xm-1+ . . . +x+1 as a polynomial to derive the GF(2m) where said f has an irreducible increased number of order, the multiplication circuit comprising a first shift register having m stages whose initial value is one of the elements of the Galois field, m AND gates to which the other element of the Galois field and an output signal from the last m-th stage of the first shift register are input, a second shift register having m+1 stages having an exclusive OR gate at the input of each of the first through m-th stages thereof, and second m exclusive OR gates to which an output signal from the last (m+1)-th stage of the second shift register and an output signal from the first through m-th stages are applied.
|
