发明名称 |
Method and device for producing undercut gate for flash memory |
摘要 |
A method and resulting integrated circuit device (100) such as a flash memory device and resulting cell. The method includes a step of providing a substrate (115), which has an active region overlying a thin layer of dielectric material (113). The method uses a step of forming a floating gate layer (107) overlying the thin layer of dielectric material (113), which is commonly termed a "tunnel oxide" layer, but is not limited to such a layer or material. The floating gate layer (107) has novel geometric features including slant edges (121), which extend to the dielectric material (123). The slant edges (121) create a smaller geometric area for the tunnel oxide region relative to the area between the floating gate layer and the control gate layer.
|
申请公布号 |
US6136653(A) |
申请公布日期 |
2000.10.24 |
申请号 |
US19980075852 |
申请日期 |
1998.05.11 |
申请人 |
MOSEL VITELIC, INC. |
发明人 |
SUNG, KUO-TUNG;LEE, RAY C. |
分类号 |
H01L21/28;H01L27/115;H01L29/423;(IPC1-7):H01L21/824 |
主分类号 |
H01L21/28 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|