发明名称 |
MASK AND PATTERN TRANSFER METHOD |
摘要 |
<p>PROBLEM TO BE SOLVED: To make it possible to improve the pattern dimensional accuracy and to produce high-performance solid-state elements in a high yield by using a mask previously corrected so that the pattern sizes of circuit patterns are made uniform. SOLUTION: The mask is prepared and the size distribution of the mask patterns is measured (stages 1 and 2). Resist patterns are formed on a substrate by using the prepared mask and the pattern size distribution is measured (stages 3 and 4). The pattern size formed by etching of a ground surface film is measured and a mask pattern size correction rate is obtained from the measured size distribution data (stages 5 and 6). The resultant mask pattern size correction rate distribution and the design pattern are subjected to arithmetic processing and the exposure data for mask formation are formed (stage 7). The mask is formed by using the pattern data formed in the manner described above (stage 8). The mask patterns are transferred onto a substrate by using the mask (stage 9). As a result, the pattern dimensional accuracy within a shot can be improved.</p> |
申请公布号 |
JP2000292906(A) |
申请公布日期 |
2000.10.20 |
申请号 |
JP19990103711 |
申请日期 |
1999.04.12 |
申请人 |
HITACHI LTD |
发明人 |
IMAI AKIRA;HASEGAWA NORIO;HAYANO KATSUYA;ASAI NAOKO |
分类号 |
H01L21/027;G03F1/36;G03F1/68;G03F1/72;(IPC1-7):G03F1/08 |
主分类号 |
H01L21/027 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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