| 摘要 |
A multiplexing timing signal generator (1) generates a multiplexing timing signal activated for each interval corresponding to a number of chips delayed in multiplexing between data to be transmitted. Driven by the multiplexing timing being active, each operation unit multiplies identical data to be transmitted by a chip of a spreading code sequence and each chip corresponding to a spread spectrum result is added in an operation unit 3(1) to an offset value and in operation units 3(2)-3(N) to their respective, immediately preceding registers 2(1)-2(N-1) values and output as signals for subsequent registers 2(1)-2(N). Thus a multiplexing process is effected. Data to be transmitted has its spectrum spread by a spreading code sequence C1-CN and a result of multiplexing the same in response to a multiplexing timing signal is output from a register(2(N)) by 1 chip at a time in synchronization with a clock signal. <IMAGE> |
