发明名称 METHOD AND DEVICE FOR CREATING CHIP LAYOUT
摘要 PROBLEM TO BE SOLVED: To create a chip layout of a chip array having a desired pattern at pattern formation with sure even in a semiconductor substrate in which there is given a bad mark, a flaw, etc. SOLUTION: A pattern matching result of a non-defective chip is obtained with a picture image of a non-defective chip pattern as a reference, and a pattern matching result of a TEG (a chip to be inspected) is obtained with the picture image of the non-defective chip pattern as a reference. Based on these results, a threshold that discriminates the non-defective chip and a defective chip in which there is given a bad mark from the TEG is set, and pattern matching is performed for each chip of a wafer 11. Based on the result and the threshold, it is decided that each chip is a chip having a desired pattern only when it is a non-defective chip or a defective chip, and a chip layout is created using the result of decision.
申请公布号 JP2000294612(A) 申请公布日期 2000.10.20
申请号 JP19990098904 申请日期 1999.04.06
申请人 KOMATSU LTD 发明人 OKUBO TAKESHI;TADA SHIGEYUKI
分类号 H01L21/82;G06T1/00;G06T7/00;H01L21/66 主分类号 H01L21/82
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