| 摘要 |
PROBLEM TO BE SOLVED: To attain high-speed A/D conversion coping with high resolution while employing an A/D converter adopting the standard logic. SOLUTION: The A/D conversion system converting an analog signal into a digital signal according to timing of a clock signal is provided with a plurality of A/D converters 5, 6 receiving an analog signal S11, and a plurality of the A/D converters 5, 6 sequentially concert the analog signal S11 into a digital signal in a different timing by a time dividing a period of the clock signal CK11 by number of the A/D converters 5, 6. In this invention, a plurality of the A/D converters 5, 6 conduct A/D conversion in a different timing by a time dividing a period of the clock signal CK11 by (number of the A/D converters). Thus, since each of the A/D converters 5, 6 has only to conduct A/D conversion at a period that is a multiple of (number of the A/D converters) a period of required A/D conversion corresponding to high resolution, the A/D conversion system can employ A/D converters adopting the standard logic such as TTL or CMOS.
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