发明名称 SHADOW RAM CELL USING FERROELECTRIC CAPACITOR, NON- VOLATILE MEMORY DEVICE, AND ITS CONTROL METHOD
摘要 PROBLEM TO BE SOLVED: To increase circuit scale by reducing the number of constitution elements of a memory cell, and to perform write-in by applying power source voltage in which voltage drop is not caused as it is, with respect to a shadow RAM using a ferroelectric capacitor. SOLUTION: Ferroelectric substances F0, F1 are connected directly to each of storage nodes M0, M1 of an ordinary SRAM cell constituted of six transistors. Thereby, two transistors per one cell can be reduced. Increasing capacity can be performed in the extent of a conventional SRAM. Also, as voltage drop by a transistor is not caused, power source voltage is applied to a ferroelectric capacitor as it is and write-in can be performed.
申请公布号 JP2000293989(A) 申请公布日期 2000.10.20
申请号 JP19990099534 申请日期 1999.04.07
申请人 NEC CORP 发明人 MIWA TATSU
分类号 G11C11/41;G11C11/22;G11C14/00 主分类号 G11C11/41
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