| 摘要 |
PROBLEM TO BE SOLVED: To provide a phase adjusting system realizing hit-less switching having the maximum value of delay quantity that can be phase-adjusted from 32 frame fixing to 8K frame with the memory of less capacity by executing multi-frame synchronism for phase adjustment through the use of a fixed byte and a variable byte. SOLUTION: In the two bytes of a J1 multi-frame inserted from a J1 INS part 51, one byte is set to be a fixed value and the other one byte to be a counter value which is increased. One fixed byte in the 64 frames of the J1 multi-frame is each detected and the position of the frame is decided. Then, the counter values of one remaining byte are compared and then the delay or advance phases of the signals are judged. Namely, phase adjustment is executed by using the fixed byte and the increased variable byte for the phase adjustment of 64 frame units. Thus, phase adjustment for hit-less switching absorbing the phase difference of not less than 32 frames can be realized.
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