PROCESSOR HAVING CLOCK CONTROL CIRCUIT OF BUILT-IN PERIPHERAL FUNCTION MODULE

摘要

PROBLEM TO BE SOLVED: To add a 1st circuit that detects whether or not a 1st debug function is used and a 2nd circuit that nullifies a module stop function to a debug module controlled by a program because there is a problem that the clock of the module stops and falls into being impossible to be debugged just after executing processing to stop the clock when a program described so as to stop the clock of a built-in debug module is debugged by using a debug function. SOLUTION: Hardware automatically detects the debugged state and non- debugged state of a program by using a 1st circuit (write pulse detection circuit 402) that detects whether or not a debug function is used and a 2nd circuit (clock stop suppression circuit 303) which nullifies the clock stop function of a debug module on the basis of the detected results of the 1st circuit and nullifies the clock stop function of the debug module incorporated into a program of a debug object in a debugged state.