| 摘要 |
PROBLEM TO BE SOLVED: To obtain a semiconductor storage that can relieve failure without spoiling high-speed access performance, and reduces the failure rate of a redundancy circuit for improving a manufacturing yield. SOLUTION: A memory array is divided into a plurality of cell array blocks, a bit line BL and a word line WL are continuously provided in a cell array block 11, and a memory cell is arranged at the intersection part. A redundancy cell array 12 for replacing a failure column is arranged at nearly the center part in the direction of the word line WL of the cell array block 11. |
