发明名称 SEMICONDUCTOR STORAGE
摘要 PROBLEM TO BE SOLVED: To prepare a test address space only in a size that is required for the access of a 1st test input/output means by inputting and outputting the data corresponding to the 2nd input/output terminals which are smaller in number than the 1st input/output terminals by means of a test address and via a 2nd test input/output terminal. SOLUTION: A signal TESTE 16 which designates a test mode is activated to designate an address 1000 (binary number) by means of a test address (PA0-3), for example. Thus, an I/O(7) is selected out of I/O(0-15) and performs input/ output as a PI/O(0). The PI/O(1) is no designated and accordingly does not perform input/output. When an address 0000 (binary number) is designated by means of the address PA0-3, the I/O(0) performs input/output as a PI/O(0) and an I/O(16) performs input/output via the PI/O(1) since the I/O(0) and I/O(16) included in an I/O(0-15) are allocated to the address 0000.
申请公布号 JP2000294000(A) 申请公布日期 2000.10.20
申请号 JP19990097317 申请日期 1999.04.05
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SADAKATA HIROYUKI;AGATA MASASHI
分类号 G01R31/28;G11C29/00;G11C29/12;(IPC1-7):G11C29/00 主分类号 G01R31/28
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