发明名称 NONVOLATILE SEMICONDUCTOR MEMORY AND SEMICONDUCTOR INTEGRATED CIRCUIT CONTAINING THE SAME MEMORY
摘要 <p>PROBLEM TO BE SOLVED: To decrease the total writing frequency and to shorten the writing time by completing the writing processing of a plurality of storage elements when the completion of writing is discriminated even once for all storage elements. SOLUTION: A writing (or erasing) operation is ended when the completion of writing is discriminated even once to all storage elements even though a storage element whose writing (or erasing) operation is discriminated as unfinished by the verifying operation carried out at that moment is existent. Here, voltage is applied again to the storage element whose writing (or erasing) operation is discriminated as unfinished. Instead, a 1st decision level is prepared to decide a storage element where a rewriting (or erasing) operation is to be carried out together with a 2nd decision level prepared for discriminating the end of a writing (or erasing) operation. The potential of the 2nd decision level is set at a level that is more different from the threshold of an erased (or written) storage element than that of the 1st decision level.</p>
申请公布号 JP2000293992(A) 申请公布日期 2000.10.20
申请号 JP19990097507 申请日期 1999.04.05
申请人 HITACHI LTD;HITACHI DEVICE ENG CO LTD;HITACHI ULSI SYSTEMS CO LTD 发明人 UCHIDA YUNOSUKE;SAITO YASUYUKI;WAKABAYASHI MAMORU
分类号 G06F12/16;G06F15/78;G11C16/02;(IPC1-7):G11C16/02 主分类号 G06F12/16
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