| 摘要 |
<p>A variable logic circuit, such as an FPGA (Field Programmable Gate Array), comprising basic logic cells (cell logic block) and capable of outputting a signal representing whether or not the circuit is normal for each logic cell and of constituting an arbitrary logic is provided in a semiconductor chip. A memory test circuit for testing a memory circuit instructs a variable logic circuit (FPGA) to perform a self-test, generates a predetermined test signal and an expectation signal referring to the information representing fault portions detected by the self-test according to a predetermined algorithm by means of only normal basic logic cells, feeds the test signal to the memory circuit, compares the output signal (output data) from the memory circuit with the expectation signal (expectation data), generates a signal representing a fault if the output signal does not agree with the expectation signal, and outputs the signal to the outside of the chip.</p> |
