发明名称 Semiconductor memory for logic-hybrid memory
摘要 This invention provides ways to intercept abnormal power signals to prevent damaging the memory in a semiconductor. To achieve this, the semiconductor memory comprises a first control signal line controlling a selection from row addresses, a second control signal line controlling a selection from column addresses, a first voltage control means cutting off the first control signal line in case that predetermined number of control signals are abnormal, and a second voltage control means cutting off the second control signal line in case that predetermined number of control signals are abnormal.
申请公布号 US6134174(A) 申请公布日期 2000.10.17
申请号 US19970949762 申请日期 1997.10.14
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TAKASE, SATORU
分类号 G11C7/10;G11C7/22;G11C8/00;G11C8/20;G11C11/408;(IPC1-7):G11C8/00 主分类号 G11C7/10
代理机构 代理人
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