| 摘要 |
The present invention relates to a method of forming a gate spacer on the semiconductor wafer. Two dielectric layers are first formed on the surface of the semiconductor wafer, the first dielectric layer is an USG dielectric layer and the second dielectric layer is a SOG dielectric layer. The SOG dielectric layer is formed by a spincoating process to create a flat surface on the semiconductor wafer. Afterward, the plasma etching, wet etching and dry etching processes are sequentially performed to remove the SOG dielectric layer and USG dielectric layer. Finally, the spacer is formed on the side-wall of the gate.
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