发明名称 |
Method and apparatus for efficient implementation of a multirate LMS filter |
摘要 |
An efficient implementation of a multirate filter with delayed error feedback prevents an instruction processing rate requirement from increasing by performing interpolation and decimation in a LMS filter element at the same time. The multirate filter calculates an ith coefficient value, wherein i is a set of consecutive integers, by obtaining an (i-1)th error value, obtaining an (i-1)th data value, multiplying the (i-1)th error value and the (i-1)th data value to obtain an ith coefficient product, obtaining Mth coefficient value from a coefficient register, wherein M is a predetermined integer, adding the Mth coefficient value to the ith coefficient product to obtain an ith coefficient value calculating an ith data value by multiplying the (i-1)th data value and the Mth coefficient value to produce ith convolution product, and adding an (i-1)th convolution sum to the ith convolution product to produce an ith convolution sum. Obtaining of the Mth coefficient value decimates the convolution product by M and interpolates the error value by M. Obtaining of the (i-1)th data value further includes incrementing a data register by one when new data is not written into the data register.
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申请公布号 |
US6134570(A) |
申请公布日期 |
2000.10.17 |
申请号 |
US19980075641 |
申请日期 |
1998.05.11 |
申请人 |
LEVEL ONE COMMUNICATIONS, INC. |
发明人 |
CAMAGNA, JOHN R.;TAKATORI, HIROSHI;AN, PING |
分类号 |
H03H21/00;(IPC1-7):G06F17/10 |
主分类号 |
H03H21/00 |
代理机构 |
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主权项 |
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